Resolve XUSCHF5 XTAM All Guard Attacks in AMarkets-Demo ...

This commit is contained in:
2024-02-21 15:53:38 +03:30
parent b58f633edb
commit 3eedf27c3b
4 changed files with 49 additions and 19 deletions
@@ -4736,12 +4736,22 @@ bool XUSCHF5XTAMHasLongSignal()
mConditions.isXAMABearish) &&
(
//
(mConditions.isXCHLHMCLCHHSame &&
mConditions.isXCHMASCTrendsUp &&
mConditions.isXCHMAMCTrendsDown &&
mConditions.isXTDSignalUnderBear &&
mConditions.isXCHMAMCFastOverSlow &&
mConditions.isXTDBullCrossedUnderBear)
((mConditions.isXCHMASCTrendsUp &&
mConditions.isXCHMAMCTrendsDown &&
mConditions.isXCHMAMCFastOverSlow) &&
(
//
mConditions.isXTSAllSame
//
||
//
(mConditions.isXCHLHMCLCHHSame &&
mConditions.isXTDSignalUnderBear &&
mConditions.isXTDBullCrossedUnderBear)
//
)
//
)
//
)
//
+1 -1
View File
@@ -21,7 +21,7 @@ XTAM
-----
Resolve XUSCHF5 XTAM All Stopouts in All Markets ...
Resolve XUSCHF5 XTAM All Critical Guard Attacks in All Markets ...
Resolve XUSCHF5 XTAM All Guard Attacks in AMarkets-Demo ...
Resolve XUSCHF5 XTAM All Guard Attacks in IFCMarkets ...
XSI
@@ -4736,12 +4736,22 @@ bool XUSCHF5XTAMHasLongSignal()
mConditions.isXAMABearish) &&
(
//
(mConditions.isXCHLHMCLCHHSame &&
mConditions.isXCHMASCTrendsUp &&
mConditions.isXCHMAMCTrendsDown &&
mConditions.isXTDSignalUnderBear &&
mConditions.isXCHMAMCFastOverSlow &&
mConditions.isXTDBullCrossedUnderBear)
((mConditions.isXCHMASCTrendsUp &&
mConditions.isXCHMAMCTrendsDown &&
mConditions.isXCHMAMCFastOverSlow) &&
(
//
mConditions.isXTSAllSame
//
||
//
(mConditions.isXCHLHMCLCHHSame &&
mConditions.isXTDSignalUnderBear &&
mConditions.isXTDBullCrossedUnderBear)
//
)
//
)
//
)
//
@@ -4736,12 +4736,22 @@ bool XUSCHF5XTAMHasLongSignal()
mConditions.isXAMABearish) &&
(
//
(mConditions.isXCHLHMCLCHHSame &&
mConditions.isXCHMASCTrendsUp &&
mConditions.isXCHMAMCTrendsDown &&
mConditions.isXTDSignalUnderBear &&
mConditions.isXCHMAMCFastOverSlow &&
mConditions.isXTDBullCrossedUnderBear)
((mConditions.isXCHMASCTrendsUp &&
mConditions.isXCHMAMCTrendsDown &&
mConditions.isXCHMAMCFastOverSlow) &&
(
//
mConditions.isXTSAllSame
//
||
//
(mConditions.isXCHLHMCLCHHSame &&
mConditions.isXTDSignalUnderBear &&
mConditions.isXTDBullCrossedUnderBear)
//
)
//
)
//
)
//