saherelm/MQL5Data
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

try to resolve short sls ...

Browse Source
This commit is contained in:
saherelm
2024-07-05 17:57:50 +03:30
parent f846523f70
commit 77df7b5d5d
1 changed files with 114 additions and 34 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Classes/x-saherelm.x121.setup.class.mq5
+83 -3
View File
@@ -3684,11 +3684,21 @@ struct X121SignalGenerator
//
||
//
(conditions.ichConditions.isClosedUnderKijunSen &&
conditions.ichConditions.isTenkanSenUnderKijunSen &&
conditions.ichConditions.isSenkouSpanAUnderB &&
((conditions.ichConditions.isClosedUnderKijunSen &&
conditions.ichConditions.isTenkanSenUnderKijunSen) &&
(
//
conditions.ichConditions.isSenkouSpanAOverB
//
||
//
(conditions.ichConditions.isSenkouSpanAUnderB &&
conditions.ichConditions.isSenkouSpanAOverLast)
//
)
//
)
//
||
//
(!conditions.ichConditions.isTenkanSenOverKijunSen &&
@@ -3698,6 +3708,25 @@ struct X121SignalGenerator
conditions.ichConditions.isSenkouSpanAOverLast &&
conditions.ichConditions.isSenkouSpanACrossedOverLast)
//
||
//
((conditions.ichConditions.isTenkanSenUnderKijunSen &&
conditions.ichConditions.isClosedUnderKijunSen) &&
//
(
//
conditions.ichConditions.isSenkouSpanAOverB
//
||
//
(conditions.ichConditions.isFutureSenkouSpanAUnderB &&
conditions.ichConditions.isSenkouSpanACrossedOverB &&
conditions.ichConditions.isFutureSenkouSpanAUnderLast)
//
)
//
)
//
)
//
||
@@ -3721,6 +3750,8 @@ struct X121SignalGenerator
)
//
&&
//
(
//
(
//
@@ -3739,6 +3770,39 @@ struct X121SignalGenerator
//
)
//
||
//
(
//
conditions.pvConditions.isSCBearish &&
conditions.pvConditions.isMCBearish &&
conditions.pvConditions.isSCHHBearish &&
conditions.pvConditions.isSCLLBearish &&
conditions.pvConditions.isMCHHBearish &&
conditions.pvConditions.isMCLLBearish &&
conditions.pvConditions.isLCLLBearish &&
conditions.pvConditions.isHCLLBearish &&
conditions.pvConditions.isSCSwitchedToBearish &&
conditions.pvConditions.isMCSwitchedToBearish &&
conditions.pvConditions.isLCSwitchedToBearish &&
conditions.pvConditions.isHCSwitchedToBearish &&
conditions.pvConditions.isSCLLSwitchedToBeraish &&
conditions.pvConditions.isMCLLSwitchedToBeraish &&
conditions.pvConditions.isLCLLSwitchedToBeraish &&
conditions.pvConditions.isHCLLSwitchedToBeraish &&
//
!conditions.pvConditions.isLCBearish &&
!conditions.pvConditions.isHCBearish &&
!conditions.pvConditions.isLCHHBearish &&
!conditions.pvConditions.isHCHHBearish &&
!conditions.pvConditions.isMCHHSwitchedToBearish &&
!conditions.pvConditions.isLCHHSwitchedToBearish &&
!conditions.pvConditions.isHCHHSwitchedToBearish
//
)
//
)
//
)
//
||
@@ -3752,6 +3816,9 @@ struct X121SignalGenerator
conditions.pvConditions.isCloseOverFib3 &&
conditions.pvConditions.isCloseOverFib4 &&
conditions.pvConditions.isCloseOverFib5 &&
(
//
(
//
!conditions.pvConditions.isNewVale &&
!conditions.pvConditions.isNewValeOverLast &&
@@ -3775,6 +3842,19 @@ struct X121SignalGenerator
//
)
//
||
//
(
//
conditions.pvConditions.isSCHHBullish &&
conditions.pvConditions.isMCHHBullish
//
)
//
)
//
)
//
)
//
)